We also develop a new word-level fault parallel fs algorithin for synchronous sequential circuits 接着又开发了一个新的单机字级故障并行fs算法。
The content of this thesis just is parallel atpg algorithlms and it prototype system for non-scan synchionous sequential circuits 本文的研究内容正是面向非扫描同步时序电路的并行atpg算法。
Most of vlsi circuits are sequential circuits . sequential circuits can be simulated by symbolic finite state machine ( fsm ) vlsi系统中大部分是时序电路,时序电路可以用符号化的有限状态机(finite-state-machine,简称fsm)来模拟。
Most of vlsi circuits are sequential circuits . sequential circuits can be simulated by symbolic finite state machine ( fsm ) vlsi系统中大部分是时序电路,时序电路可以用符号化的有限状态机(finite-state-machine,简称fsm)来模拟。
Although some scholars have done lots of work on the test generation of the digital circuits, it is still a well-known puzzle to test sequential circuits 虽然各国学者在数字电路测试生成上已做了大量的工作,时序电路的测试生成仍然是公认的难题。
The sy-stem had different requirements on time sequence in high-speed clock and low-speed clock situations, which resulted in the complexity of the sequential circuit 在高速时钟和低速时钟的情况下,系统有不同的时序要求,这就决定了时序电路的复杂性。